Computer Organization & Architecture
Unit 5: Input-Output Organization
From peripheral devices to DMA controllers — master how computers communicate with the outside world, handle interrupts, and transfer data at blazing speed.
⏱️ 5 hrs theory + 3 hrs lab | 🎯 GATE ~2 marks | 🖥️ Aadhaar Biometric I/O
💼 Jobs this unlocks: Embedded Systems Engineer (₹5–10 LPA) | Hardware Design Engineer (₹6–12 LPA) | IoT Developer (₹4–8 LPA)
Opening Hook — The Fingerprint That Feeds 80 Crore Indians
🖐️ How Aadhaar's Fingerprint Scanner Bypasses the CPU
Walk into any Indian ration shop, place your thumb on the biometric scanner, and within 2 seconds your identity is verified against a database of 1.4 billion records. But here's the engineering marvel most people miss: when that fingerprint scanner captures your print, the image data doesn't pass through the CPU.
The biometric device uses Direct Memory Access (DMA) — a hardware technique where the scanner writes fingerprint data directly into memory, bypassing the CPU entirely. Why? Because the CPU is too busy running the operating system, managing the display, and handling network packets. If the CPU had to personally move every byte of fingerprint image data, the verification would take 10× longer.
This isn't just theory — it's the I/O architecture that powers India's largest digital identity system. The same DMA principle is used in your phone (camera sensor → memory), your laptop (SSD → RAM), and every ATM you've ever used. This chapter teaches you exactly how all of this works.
Learning Outcomes — Bloom's Taxonomy Mapped
| Bloom's Level | Learning Outcome |
|---|---|
| 🔵 Remember | List the three modes of data transfer (Programmed, Interrupt-driven, DMA) and define each |
| 🔵 Remember | Recall the difference between Memory-mapped I/O and Isolated (I/O-mapped) I/O |
| 🟢 Understand | Explain how DMA transfers data without CPU intervention and describe cycle stealing |
| 🟢 Understand | Describe the handshaking protocol in asynchronous data transfer with timing diagrams |
| 🟡 Apply | Calculate DMA transfer rates, bus bandwidth, and interrupt latency for given configurations |
| 🟡 Apply | Draw the UART frame format for a given character with correct start, data, parity, and stop bits |
| 🟠 Analyze | Compare daisy chain vs parallel priority interrupt structures with trade-offs |
| 🟠 Analyze | Analyze why certain I/O devices (keyboard vs disk) use different transfer modes |
| 🔴 Evaluate | Evaluate which data transfer mode is optimal for a given real-world I/O scenario (sensor, camera, network card) |
| 🔴 Evaluate | Assess the performance impact of DMA burst mode vs cycle stealing on CPU utilization |
| 🟣 Create | Design a priority interrupt system for a given set of devices with different priority levels |
| 🟣 Create | Design a complete I/O interface block diagram for an embedded system with multiple peripherals |