Basic Electronics & Physics

Solid State Physics, Electronics & Digital Systems

From semiconductor physics to Arduino sensors โ€” master the complete foundation of modern electronics engineering across 6 comprehensive units.

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Unit I

Solid State Physics

๐Ÿ”ฌ How a Grain of Silicon Powers Your Entire World

In 2024, Intel announced a $33 billion investment to build chip fabrication plants. Meanwhile, India's Semi-Conductor Laboratory (SCL) Mohali is being upgraded under the India Semiconductor Mission. Every smartphone, laptop, and satellite โ€” from your โ‚น10,000 Redmi phone to ISRO's NavIC satellites โ€” runs on the physics you're about to learn.

A single modern processor contains 100+ billion transistors, each just 3 nanometers wide (30 atoms!). All of this is possible because of solid state physics โ€” the science of how electrons behave inside crystalline solids.

Intel India๐Ÿ‡ฎ๐Ÿ‡ณ SCL MohaliTSMCSamsung๐Ÿ‡ฎ๐Ÿ‡ณ ISRO

Free Electron Theory (Drude Model)

The free electron theory, proposed by Paul Drude in 1900, treats valence electrons in a metal as a "gas" of free particles that can move through the crystal lattice.

Key Assumptions of the Drude Model

  1. Valence electrons are free to move throughout the metal (they are not bound to any particular atom).
  2. Electrons do not interact with each other (independent electron approximation).
  3. Electrons collide with ion cores (lattice atoms), not with each other. The average time between collisions is the relaxation time $\tau$.
  4. After each collision, the electron's velocity is randomized โ€” it "forgets" its previous direction.
  5. Between collisions, electrons obey Newton's laws (classical mechanics).

Diffusion Current

When there is a concentration gradient of charge carriers (more electrons in one region than another), carriers diffuse from high to low concentration, creating a diffusion current:

$$J_{diff,n} = q D_n\frac{dn}{dx} \quad \text{(for electrons)}$$ $$J_{diff,p} = -q D_p\frac{dp}{dx} \quad \text{(for holes)}$$

where $D_n, D_p$ are diffusion coefficients. The Einstein relation connects diffusion and mobility: $D = \frac{kT}{q}\mu$.

Drift Current

Without an external field, electrons move randomly with zero net displacement. When an electric field $\vec{E}$ is applied, electrons acquire a small drift velocity $v_d$ superimposed on their random motion.

The drift current density $J$ is the current per unit cross-sectional area:

$$J_{drift} = \frac{I}{A} \quad \text{(A/cmยฒ)}$$

Since current is the flow of charge carriers, we can write:

$$J = n \cdot q \cdot v_d = \rho_v \cdot v_d$$

where $n$ = carrier concentration (number/cmยณ), $q$ = charge of carrier, $v_d$ = drift velocity (cm/s), and $\rho_v = n \cdot q$ is the volume charge density (C/cmยณ).

Mobility ($\mu$)

The drift velocity is proportional to the applied electric field:

$$\boxed{v_d = \mu \cdot E}$$

where $\mu$ is the mobility of the charge carrier (cmยฒ/Vยทs). Mobility is a measure of how easily charge carriers move under the influence of an applied electric field โ€” it determines how mobile the charge carriers are.

Substituting $v_d = \mu E$ into the current density equation:

$$\boxed{J = n \cdot q \cdot \mu \cdot E}$$
Drift velocity in copper is only about 0.1 mm/s! Yet when you flip a switch, the light turns on almost instantly because the electric field propagates at nearly the speed of light, pushing ALL electrons simultaneously.
Conductivity of a Semiconductor ($\sigma$)

In a semiconductor, both electrons and holes contribute to drift current. We write the current density for each carrier separately:

Hole drift current:

$$J_p = p \cdot q \cdot \mu_p \cdot E$$

Electron drift current:

$$J_n = n \cdot q \cdot \mu_n \cdot E$$

The total drift current density is the sum of both:

$$J = J_p + J_n = p q \mu_p E + n q \mu_n E$$ $$\boxed{J = (p\mu_p + n\mu_n) \cdot q \cdot E = \sigma \cdot E}$$

where the conductivity of the semiconductor is:

$$\boxed{\sigma = (p\mu_p + n\mu_n) \cdot q} \quad \text{(ฮฉยทcm)}^{-1}$$

Conductivity for Different Semiconductor Types

Intrinsic Semiconductor: Since $n = p = n_i$:

$$\sigma = (\mu_p + \mu_n) \cdot n_i \cdot q$$

N-type Semiconductor: Since $n \gg p$ (electrons dominate):

$$\sigma \approx n \cdot q \cdot \mu_n \approx N_D \cdot q \cdot \mu_n$$

P-type Semiconductor: Since $p \gg n$ (holes dominate):

$$\sigma \approx p \cdot q \cdot \mu_p \approx N_A \cdot q \cdot \mu_p$$

Fermi Energy & Fermi-Dirac Distribution

How to Count the Number of Carriers?

To determine how many electrons participate in conduction, we need two things:

  1. Density of States $g(E)$ โ€” tells us how many energy states exist at a given energy $E$.
  2. Fermi-Dirac Distribution Function $f(E)$ โ€” tells us the probability that an available state at energy $E$ is occupied by an electron.

The total carrier concentration is then:

$$n = \int g(E) \cdot f(E) \, dE$$

In other words: Number of carriers = (Number of available states) ร— (Probability of occupation).

The Fermi-Dirac Distribution Function

The Fermi energy $E_F$ is the highest energy level occupied by electrons at absolute zero (0 K). It represents the "top of the filled electron sea." It is the energy of the highest occupied quantum state.

At any temperature $T$, the probability that a quantum state at energy $E$ is occupied by an electron is given by the Fermi-Dirac distribution function:

$$f(E) = \frac{1}{1 + e^{(E - E_F)/kT}}$$

where $E_F$ = Fermi energy, $k$ = Boltzmann constant ($1.38 \times 10^{-23}$ J/K = $8.6 \times 10^{-5}$ eV/K), and $T$ = absolute temperature in Kelvin.

Since $f(E)$ gives the probability of finding an electron, then $1 - f(E)$ gives the probability of finding a hole (i.e., the probability that a state is empty or unoccupied).

Meaning of Fermi Level

The Fermi level ($E_F$) is the energy level with exactly 50% probability of finding an electron, at any temperature $T > 0$ K. When $E = E_F$:

$$f(E_F) = \frac{1}{1 + e^0} = \frac{1}{2} = 50\%$$

Key Properties of Fermi-Dirac Distribution

Conditionf(E)Meaning
$E = E_F$$\frac{1}{2}$ (always 50%)Fermi level is the 50% probability point
$E \ll E_F$$\approx 1$States well below $E_F$ are fully occupied
$E \gg E_F$$\approx 0$States well above $E_F$ are empty
$T = 0$ KStep functionAll states below $E_F$ filled, all above empty
$T > 0$ KSmooth curveSome states near $E_F$ become partially occupied

Effect of Temperature on Fermi-Dirac Distribution

  • At $T = 0$ K, the electrons have the lowest energy and occupy the lower energy states. The distribution is a sharp step function โ€” all states below $E_F$ are completely filled, all above are completely empty.
  • As the temperature increases, electrons gain thermal energy. Some electrons near $E_F$ get excited to higher energy states. The sharp step smooths out into an S-shaped curve. The higher the temperature, the more gradual the transition around $E_F$.
  • The Fermi level itself is independent of temperature in metals (it remains the 50% probability point).

Significance of Fermi Level

  1. It is used to separate vacant and filled states at 0 K.
  2. It tells us the status of electrons โ€” whether states at a given energy are likely occupied or empty.
  3. Electrons are completely filled below the Fermi energy level and completely empty above it at 0 K.
  4. At temperatures above 0 K, some electrons absorb thermal energy and jump to higher energy levels, creating the smooth distribution.
  5. In semiconductors, the position of $E_F$ relative to the band edges tells us the type and degree of doping.
Students often confuse Fermi energy with Fermi level. Fermi energy is defined at 0 K. Fermi level is the energy at which $f(E) = 1/2$ at any temperature $T$. They are equal only at 0 K.

Total Current Density in a Semiconductor

In a semiconductor, current flows due to both drift (due to electric field) and diffusion (due to concentration gradient). The total current density combines both contributions from electrons and holes:

$$J_{total} = J_{drift} + J_{diffusion}$$ $$J_{total} = \underbrace{(ne\mu_e + pe\mu_h)E}_{\text{Drift}} + \underbrace{\left(eD_n\frac{dn}{dx} - eD_p\frac{dp}{dx}\right)}_{\text{Diffusion}}$$

where $n, p$ = electron and hole concentrations, $\mu_e, \mu_h$ = mobilities, and $D_n, D_p$ = diffusion coefficients.

Band Theory of Solids

When atoms come together to form a solid, their discrete energy levels split into bands of closely spaced energy levels due to the interaction between atomic orbitals. Instead of single energy levels, there will be bands of energy levels formed due to the intermixing of atoms. These sets of closely packed energy levels are called Energy Bands.

Formation of Energy Bands

Consider $N$ atoms of silicon brought together:

  • Each atom has discrete energy levels (1s, 2s, 2p, 3s, 3p).
  • As atoms approach, the Pauli exclusion principle forces the $N$ identical energy levels to split into $N$ closely spaced but distinct levels.
  • These $N$ levels form a quasi-continuous band.
Valence Band

The electrons present in the outermost shell are called Valence Electrons. These valence electrons, containing a series of energy levels, form an energy band called the Valence Band. The valence band is the band having the highest occupied energy.

Conduction Band

Some valence electrons gain enough energy to leave their atoms and become free electrons, which can move toward neighboring atoms. These free electrons are the ones that conduct current in a conductor and are hence called Conduction Electrons. The band containing these conduction electrons is called the Conduction Band โ€” it is the band having the lowest unoccupied energy.

Forbidden Energy Gap ($E_g$)

The gap between the valence band and the conduction band is called the Forbidden Energy Gap. No electron can exist in this energy range. Depending upon the size of this forbidden gap, materials are classified as Insulators, Semiconductors, or Conductors.

Classification of Solids Based on Band Gap

Insulators

Insulators are materials in which conduction cannot take place due to a very large forbidden gap. Examples: Wood, Rubber, Diamond, Glass.

  • The forbidden energy gap is very large (~10 eV for some insulators, 5.5 eV for diamond).
  • Valence band electrons are bound tightly to atoms.
  • For some insulators, as the temperature increases, they might show a very small amount of conduction.
  • Resistivity is in the order of $10^7$ ฮฉยทm or higher.
  • The conduction band is completely empty at room temperature.

Conductors

Conductors are materials in which the forbidden energy gap disappears โ€” the valence band and conduction band overlap. Examples: Copper, Aluminum, Silver.

  • There is no forbidden gap; the valence and conduction bands overlap.
  • A slight increase in voltage increases the conduction immediately.
  • There is no concept of hole formation as a continuous flow of electrons contributes to the current.
  • Resistivity is very low ($\sim 10^{-8}$ ฮฉยทm).

Semiconductors

Semiconductors are materials in which the forbidden energy gap is small and conduction takes place if some external energy is applied. Examples: Silicon, Germanium.

  • The forbidden energy gap is small: Ge โ‰ˆ 0.7 eV, Si โ‰ˆ 1.1 eV.
  • A semiconductor is actually neither an insulator nor a good conductor.
  • As the temperature increases, the conductivity increases (more electrons gain enough energy to jump the gap).
  • Conductivity is in the order of $10^2$ mho/m.
  • Both electrons and holes contribute to current.
PropertyConductorSemiconductorInsulator
Band Gap $E_g$0 eV (bands overlap)0.1 โ€“ 3 eV> 3 eV
ExamplesCu, Ag, AlSi (1.1 eV), Ge (0.67 eV)Diamond (5.5 eV), Glass
Resistivity$\sim 10^{-8}$ ฮฉยทm$10^{-5}$ to $10^{6}$ ฮฉยทm$\gt 10^{7}$ ฮฉยทm
Temperature EffectConductivity decreasesConductivity increasesRemains insulator
Current CarriersElectrons onlyElectrons and HolesNone at room temp

Concept of Effective Mass

Inside a crystal, an electron does not behave as a free particle because it interacts with the periodic potential of the lattice. We account for this by assigning it an effective mass $m^*$:

$$m^* = \frac{\hbar^2}{\frac{d^2E}{dk^2}}$$

where $E$ is the electron energy and $k$ is the wave vector (from the E-k diagram).

  • At the bottom of the conduction band, the band curves upward sharply โ†’ small $m^*$ โ†’ electrons are "light" and mobile.
  • At the top of the valence band, the band curves downward โ†’ negative $m^*$ โ†’ this is mathematically treated as a positive particle called a hole.
A hole is not a physical particle โ€” it is the absence of an electron in the valence band. It behaves like a positive charge carrier with positive effective mass. When an electron moves left to fill a vacancy, the hole effectively moves right.

Hall Effect (Complete Derivation)

The Hall effect, discovered by Edwin Hall in 1879, is used to determine the type (n or p), concentration, and mobility of charge carriers in a material.

Setup

Consider a rectangular conductor of width $w$, thickness $t$, carrying current $I$ along the x-direction. A magnetic field $\vec{B}$ is applied along the z-direction (perpendicular to the current).

Step-by-Step Derivation

Step 1: Electrons moving with drift velocity $v_d$ in the x-direction experience a Lorentz force:

$$\vec{F} = -e(\vec{v_d} \times \vec{B})$$

This force pushes electrons toward one face of the conductor (say, the bottom face).

Step 2: Electrons accumulate on the bottom face, creating a transverse electric field $E_H$ (Hall field) pointing from top to bottom. This field exerts a force $eE_H$ on the electrons, opposing further accumulation.

Step 3: At equilibrium, the electric force balances the magnetic force:

$$eE_H = ev_dB$$ $$E_H = v_dB$$

Step 4: The Hall voltage across the width $w$ is:

$$V_H = E_H \cdot w = v_d B w$$

Step 5: Since current density $J = nev_d$ and $I = Jwt$, we get $v_d = \frac{I}{newt}$. Substituting:

$$\boxed{V_H = \frac{BI}{net}}$$

Step 6: The Hall coefficient is defined as:

$$\boxed{R_H = \frac{1}{ne}} \quad \text{(for n-type: } R_H \text{ is negative)}$$ $$\boxed{R_H = \frac{1}{pe}} \quad \text{(for p-type: } R_H \text{ is positive)}$$

Applications of the Hall Effect

  1. Determine carrier type: Sign of $V_H$ tells n-type vs p-type.
  2. Measure carrier concentration: $n = \frac{BI}{V_H e t}$.
  3. Calculate mobility: $\mu = |R_H| \sigma = \frac{|R_H|}{\rho}$.
  4. Hall sensors: Used in smartphones (compass), automotive (speed sensors), and brushless DC motors.

Solved Example: Hall Effect

Numerical Problem

Problem: A silicon sample has Hall coefficient $R_H = 3.66 \times 10^{-4}$ mยณ/C. If the conductivity is $\sigma = 112$ S/m, find: (a) carrier concentration, (b) carrier mobility.

Solution:

(a) $n = \frac{1}{R_H \cdot e} = \frac{1}{3.66 \times 10^{-4} \times 1.6 \times 10^{-19}} = 1.7 \times 10^{22}$ /mยณ

(b) $\mu = R_H \cdot \sigma = 3.66 \times 10^{-4} \times 112 = 0.041$ mยฒ/Vยทs $= 410$ cmยฒ/Vยทs

Semiconductors: Intrinsic & Extrinsic

Intrinsic Semiconductors

An intrinsic semiconductor is a pure semiconductor with no impurities added. Germanium (Ge) and Silicon (Si), both Group IV elements, are the best examples. They possess a diamond cubic crystalline structure where each atom forms 4 covalent bonds with its neighbors by sharing one valence electron each.

At 0 K, all valence band states are filled and the conduction band is empty โ€” the material behaves as an insulator. At room temperature, thermal energy excites some electrons across the band gap, creating electron-hole pairs (EHP).

Electron-Hole Pair (EHP) Generation

When suitable energy (thermal, optical, etc.) is supplied to a semiconductor, electrons make a transition from the Valence Band to the Conduction Band. This simultaneously creates:

  • A free electron in the Conduction Band
  • A free hole (vacant site) in the Valence Band

This process is called Electron-Hole Pair Generation. In an intrinsic semiconductor, the number of conduction electrons is always equal to the number of holes: $n = p = n_i$.

Carrier Concentration in Intrinsic Semiconductors

Using the Density of States $g(E)$ and the Fermi-Dirac distribution $f(E)$, we can derive the equilibrium carrier concentrations:

Electrons in the Conduction Band:

$$n = N_C \exp\left(-\frac{E_C - E_F}{kT}\right)$$

where $N_C = 2\left(\frac{2\pi m_e^* kT}{h^2}\right)^{3/2}$ is the effective density of states in the conduction band.

Holes in the Valence Band:

$$p = N_V \exp\left(-\frac{E_F - E_V}{kT}\right)$$

where $N_V = 2\left(\frac{2\pi m_h^* kT}{h^2}\right)^{3/2}$ is the effective density of states in the valence band.

Intrinsic Concentration ($n_i$)

Since $n = p = n_i$ in an intrinsic semiconductor, multiplying the two equations:

$$n \cdot p = n_i^2 = N_C N_V \exp\left(-\frac{E_g}{kT}\right)$$ $$\boxed{n_i = \sqrt{N_C N_V} \exp\left(-\frac{E_g}{2kT}\right)}$$

This shows that intrinsic concentration increases exponentially with temperature and decreases with larger band gap.

Mass Action Law

The product of electron and hole concentrations in a semiconductor at thermal equilibrium is always constant, regardless of doping:

$$\boxed{n \cdot p = n_i^2}$$

This is called the Mass Action Law. It means that if you increase the electron concentration by doping (N-type), the hole concentration must decrease proportionally, and vice versa.

Fermi Level in Intrinsic Semiconductor

The Fermi level is the energy level at which the probability of finding an electron is equal to the probability of finding a hole. For an intrinsic semiconductor, setting $n = p$ and solving:

$$E_F = \frac{E_C + E_V}{2} + \frac{3}{4}kT \ln\left(\frac{m_h^*}{m_e^*}\right)$$

If $m_e^* \approx m_h^*$ (which is approximately true), then:

$$\boxed{E_F \approx \frac{E_C + E_V}{2} = E_i}$$

The Fermi level lies approximately at the middle of the band gap. This mid-gap energy is called the intrinsic Fermi level $E_i$.

Conductivity of an intrinsic semiconductor: $\sigma = n_i e(\mu_e + \mu_h)$

Extrinsic Semiconductors

Extrinsic semiconductors are those in which impurities are deliberately added (doping) to dramatically increase conductivity. Based on the type of impurity, they are classified into two categories:

N-Type Semiconductor

When a pentavalent element such as Phosphorus (P), Arsenic (As), or Antimony (Sb) is added to the intrinsic semiconductor:

  • Four of its five valence electrons form covalent bonds with four neighboring Si atoms.
  • The fifth electron is weakly bound to the parent atom. Even with a small amount of thermal energy, it is released, leaving the parent atom positively ionized.
  • These released electrons become free and can contribute to conduction.
  • The energy level of this fifth electron is called the Donor Level, which lies just below the conduction band ($E_D \approx E_C - 0.01$ to $0.05$ eV).

Result: Electrons are majority carriers and holes are minority carriers. The pentavalent impurity is called a Donor because it donates electrons.

P-Type Semiconductor

When a trivalent element such as Boron (B), Aluminum (Al), Gallium (Ga), or Indium (In) is added to the intrinsic semiconductor:

  • All three valence electrons engage in covalent bonding with three neighboring Si atoms.
  • The impurity atom needs one more electron to complete its fourth bond. This electron may be supplied by a neighboring Si atom, thereby creating a hole on the semiconductor atom.
  • The energy level of this impurity atom is called the Acceptor Level, which lies just above the valence band ($E_A \approx E_V + 0.01$ to $0.05$ eV).
  • Even at relatively low temperatures, these acceptor atoms get ionized by taking electrons from the valence band, giving rise to holes for conduction.

Result: Holes are majority carriers and electrons are minority carriers. The trivalent impurity is called an Acceptor because it accepts electrons.

PropertyN-typeP-type
DopantPentavalent (P, As, Sb)Trivalent (B, Al, Ga, In)
Impurity typeDonorAcceptor
Majority carrierElectronsHoles
Minority carrierHolesElectrons
Energy levelDonor level near $E_C$Acceptor level near $E_V$
Fermi levelCloser to conduction bandCloser to valence band
Current directionElectron currentHole current (opposite to electron flow)
Charge Neutrality & Charge Densities

In a semiconductor under thermal equilibrium, the total positive charge must equal the total negative charge. This gives the charge neutrality equation:

$$\boxed{n + N_A^- = p + N_D^+}$$

where $N_D^+$ = ionized donor concentration, $N_A^-$ = ionized acceptor concentration. At room temperature, all dopants are typically fully ionized, so $N_D^+ \approx N_D$ and $N_A^- \approx N_A$.

For an N-type semiconductor ($N_D \gg N_A$, $n \gg p$): $n \approx N_D$ and $p = n_i^2/N_D$

For a P-type semiconductor ($N_A \gg N_D$, $p \gg n$): $p \approx N_A$ and $n = n_i^2/N_A$

Fermi Level in Extrinsic Semiconductors

In N-type: The Fermi level shifts toward the conduction band. At low temperatures, it lies between the donor level and $E_C$. As temperature increases, more donor atoms get ionized, and eventually the material behaves intrinsically, with $E_F$ moving back toward the mid-gap $E_i$.

In P-type: The Fermi level shifts toward the valence band. At low temperatures, it lies between the acceptor level and $E_V$. With increasing temperature, $E_F$ gradually moves toward $E_i$.

Variation of Fermi Level with Temperature

  1. Initially, with a small increase in temperature, $E_F$ increases slightly (in N-type) or decreases slightly (in P-type).
  2. As temperature rises, more and more dopant atoms are ionized.
  3. At very high temperatures, the generation of electron-hole pairs due to breaking of covalent bonds dominates over doping. The material tends to behave in an intrinsic manner, and the Fermi level gradually moves toward the intrinsic Fermi level $E_i$ (mid-gap).
Properties of Germanium & Silicon
PropertyGermanium (Ge)Silicon (Si)
Atomic Number3214
Band Gap $E_g$0.67 eV1.12 eV
Intrinsic concentration $n_i$ (at 300 K)$2.4 \times 10^{13}$ /cmยณ$1.5 \times 10^{10}$ /cmยณ
Crystal StructureDiamond cubicDiamond cubic
Electron mobility $\mu_e$3900 cmยฒ/Vยทs1350 cmยฒ/Vยทs
Hole mobility $\mu_h$1900 cmยฒ/Vยทs480 cmยฒ/Vยทs
Dielectric constant1611.8

Generation & Recombination

Generation is the process where electron-hole pairs are created by exciting an electron from the valence band to the conduction band. Recombination is the reverse process where electrons and holes recombine and are annihilated.

In thermal equilibrium, the generation and recombination processes are in dynamic equilibrium โ€” the rate of generation equals the rate of recombination.

Types of Generation/Recombination Processes

  1. Photon Transition (Optical) โ€” Absorption of a photon creates an EHP; emission of a photon occurs during recombination (used in LEDs and solar cells).
  2. Phonon Transition (Shockley-Read-Hall / SRH) โ€” Recombination through trap states (defects/impurities) in the forbidden gap. Most common in indirect bandgap semiconductors like Si.
  3. Auger Recombination โ€” A three-particle process where the energy released during recombination is transferred to a third carrier instead of a photon. Important at very high carrier concentrations.
  4. Impact Ionization โ€” A high-energy carrier collides with the lattice and generates a new EHP. This is the mechanism behind avalanche breakdown in diodes.
Carrier Lifetime

The carrier lifetime ($\tau$) is the average time a minority carrier exists before recombining. It determines how far carriers can diffuse before recombining, and is critical for device performance:

$$L = \sqrt{D \cdot \tau}$$

where $L$ is the diffusion length and $D$ is the diffusion coefficient. A longer carrier lifetime means carriers travel farther before recombining โ€” essential for solar cells and transistors.

Direct vs Indirect Band Gap

PropertyDirect Band GapIndirect Band Gap
E-k diagramCB minimum and VB maximum at same $k$CB minimum and VB maximum at different $k$
TransitionElectron can directly emit/absorb photonRequires phonon (lattice vibration) assist
ExamplesGaAs, InP, GaNSi, Ge
ApplicationsLEDs, Laser diodes, solar cellsTransistors, ICs, CPUs
This is why Silicon is used for CPUs (doesn't need to emit light, excellent oxide layer) but GaAs is used for LEDs and lasers (efficient light emission due to direct band gap).

Solar Cells & Computational Applications

Solar Cell Basics

A solar cell is a PN junction operated under illumination. When photons with energy $h\nu \geq E_g$ strike the cell, electron-hole pairs are generated in the depletion region. The built-in electric field separates them โ€” electrons go to n-side, holes to p-side โ€” creating a photocurrent and photovoltage.

  • Open-circuit voltage: $V_{OC} = \frac{kT}{q}\ln\left(\frac{I_L}{I_0} + 1\right)$
  • Short-circuit current: $I_{SC} \approx I_L$ (photogenerated current)
  • Efficiency: $\eta = \frac{P_{max}}{P_{incident}} = \frac{V_{OC} \cdot I_{SC} \cdot FF}{P_{in}}$ where $FF$ is the fill factor (~0.7โ€“0.85).

Computational Applications

Chip Fabrication Basics

Modern CPUs and GPUs are built on silicon wafers using a highly complex manufacturing process called fabrication. The key steps include:

  1. Wafer Preparation: Pure silicon is grown into a single-crystal ingot and sliced into ultra-thin circular wafers.
  2. Photolithography: The wafer is coated with a light-sensitive photoresist. UV light shines through a "mask" (blueprint of the circuit), printing nanometer-scale patterns onto the wafer.
  3. Etching & Deposition: Chemicals etch away unprotected areas to create 3D structures, while new materials (insulators, metals) are deposited in layers.
  4. Doping (Ion Implantation): High-energy ion beams shoot specific impurities (like Boron or Phosphorus) into the silicon to create N-type and P-type regions, forming the actual transistors.

This cycle repeats 50+ times to build billions of microscopic transistors layer by layer.

CMOS Technology

CMOS (Complementary Metal-Oxide-Semiconductor) uses pairs of NMOS and PMOS transistors. A CMOS inverter has near-zero static power consumption because only one transistor is ON at a time. This is why modern CPUs can have billions of transistors without melting!

Memory Devices

SRAM: Uses 6 transistors per bit. Fast but expensive. Used in CPU cache.

DRAM: Uses 1 transistor + 1 capacitor per bit. Slower but dense. Used as main RAM.

Flash/SSD: Uses floating-gate transistors. Electrons trapped on the floating gate represent stored data. NAND flash stacks cells vertically (3D NAND) for massive storage.

AI Accelerator Chips & IoT Sensors

GPU: Thousands of small cores for parallel matrix multiplication โ€” ideal for neural network training.

TPU (Google's Tensor Processing Unit): Custom ASIC designed specifically for matrix operations in AI/ML.

IoT Sensors: Semiconductor-based sensors (temperature, pressure, gas, light) use changes in resistance, capacitance, or current due to physical stimuli.

India's Semi-Conductor Laboratory (SCL), Mohali is India's only chip fab. Under the India Semiconductor Mission (โ‚น76,000 crore budget), Tata Electronics and CG Power are building new fabs in Gujarat and Dholera. By 2028, India aims to produce chips for defense, automotive, and telecom sectors.

Semiconductors: Intrinsic & Extrinsic

Intrinsic Semiconductors

An intrinsic semiconductor is a pure semiconductor with no impurities added. Germanium (Ge) and Silicon (Si), both Group IV elements, are the best examples. They possess a diamond cubic crystalline structure where each atom forms 4 covalent bonds with its neighbors by sharing one valence electron each.

At 0 K, all valence band states are filled and the conduction band is empty โ€” the material behaves as an insulator. At room temperature, thermal energy excites some electrons across the band gap, creating electron-hole pairs (EHP).

Electron-Hole Pair (EHP) Generation

When suitable energy (thermal, optical, etc.) is supplied to a semiconductor, electrons make a transition from the Valence Band to the Conduction Band. This simultaneously creates:

  • A free electron in the Conduction Band
  • A free hole (vacant site) in the Valence Band

This process is called Electron-Hole Pair Generation. In an intrinsic semiconductor, the number of conduction electrons is always equal to the number of holes: $n = p = n_i$.

Carrier Concentration in Intrinsic Semiconductors

Using the Density of States $g(E)$ and the Fermi-Dirac distribution $f(E)$, we can derive the equilibrium carrier concentrations:

Electrons in the Conduction Band:

$$n = N_C \exp\left(-\frac{E_C - E_F}{kT}\right)$$

where $N_C = 2\left(\frac{2\pi m_e^* kT}{h^2}\right)^{3/2}$ is the effective density of states in the conduction band.

Holes in the Valence Band:

$$p = N_V \exp\left(-\frac{E_F - E_V}{kT}\right)$$

where $N_V = 2\left(\frac{2\pi m_h^* kT}{h^2}\right)^{3/2}$ is the effective density of states in the valence band.

Intrinsic Concentration ($n_i$)

Since $n = p = n_i$ in an intrinsic semiconductor, multiplying the two equations:

$$n \cdot p = n_i^2 = N_C N_V \exp\left(-\frac{E_g}{kT}\right)$$ $$\boxed{n_i = \sqrt{N_C N_V} \exp\left(-\frac{E_g}{2kT}\right)}$$

This shows that intrinsic concentration increases exponentially with temperature and decreases with larger band gap.

Mass Action Law

The product of electron and hole concentrations in a semiconductor at thermal equilibrium is always constant, regardless of doping:

$$\boxed{n \cdot p = n_i^2}$$

This is called the Mass Action Law. It means that if you increase the electron concentration by doping (N-type), the hole concentration must decrease proportionally, and vice versa.

Fermi Level in Intrinsic Semiconductor

The Fermi level is the energy level at which the probability of finding an electron is equal to the probability of finding a hole. For an intrinsic semiconductor, setting $n = p$ and solving:

$$E_F = \frac{E_C + E_V}{2} + \frac{3}{4}kT \ln\left(\frac{m_h^*}{m_e^*}\right)$$

If $m_e^* \approx m_h^*$ (which is approximately true), then:

$$\boxed{E_F \approx \frac{E_C + E_V}{2} = E_i}$$

The Fermi level lies approximately at the middle of the band gap. This mid-gap energy is called the intrinsic Fermi level $E_i$.

Conductivity of an intrinsic semiconductor: $\sigma = n_i e(\mu_e + \mu_h)$

Extrinsic Semiconductors

Extrinsic semiconductors are those in which impurities are deliberately added (doping) to dramatically increase conductivity. Based on the type of impurity, they are classified into two categories:

N-Type Semiconductor

When a pentavalent element such as Phosphorus (P), Arsenic (As), or Antimony (Sb) is added to the intrinsic semiconductor:

  • Four of its five valence electrons form covalent bonds with four neighboring Si atoms.
  • The fifth electron is weakly bound to the parent atom. Even with a small amount of thermal energy, it is released, leaving the parent atom positively ionized.
  • These released electrons become free and can contribute to conduction.
  • The energy level of this fifth electron is called the Donor Level, which lies just below the conduction band ($E_D \approx E_C - 0.01$ to $0.05$ eV).

Result: Electrons are majority carriers and holes are minority carriers. The pentavalent impurity is called a Donor because it donates electrons.

P-Type Semiconductor

When a trivalent element such as Boron (B), Aluminum (Al), Gallium (Ga), or Indium (In) is added to the intrinsic semiconductor:

  • All three valence electrons engage in covalent bonding with three neighboring Si atoms.
  • The impurity atom needs one more electron to complete its fourth bond. This electron may be supplied by a neighboring Si atom, thereby creating a hole on the semiconductor atom.
  • The energy level of this impurity atom is called the Acceptor Level, which lies just above the valence band ($E_A \approx E_V + 0.01$ to $0.05$ eV).
  • Even at relatively low temperatures, these acceptor atoms get ionized by taking electrons from the valence band, giving rise to holes for conduction.

Result: Holes are majority carriers and electrons are minority carriers. The trivalent impurity is called an Acceptor because it accepts electrons.

PropertyN-typeP-type
DopantPentavalent (P, As, Sb)Trivalent (B, Al, Ga, In)
Impurity typeDonorAcceptor
Majority carrierElectronsHoles
Minority carrierHolesElectrons
Energy levelDonor level near $E_C$Acceptor level near $E_V$
Fermi levelCloser to conduction bandCloser to valence band
Current directionElectron currentHole current (opposite to electron flow)
Charge Neutrality & Charge Densities

In a semiconductor under thermal equilibrium, the total positive charge must equal the total negative charge. This gives the charge neutrality equation:

$$\boxed{n + N_A^- = p + N_D^+}$$

where $N_D^+$ = ionized donor concentration, $N_A^-$ = ionized acceptor concentration. At room temperature, all dopants are typically fully ionized, so $N_D^+ \approx N_D$ and $N_A^- \approx N_A$.

For an N-type semiconductor ($N_D \gg N_A$, $n \gg p$): $n \approx N_D$ and $p = n_i^2/N_D$

For a P-type semiconductor ($N_A \gg N_D$, $p \gg n$): $p \approx N_A$ and $n = n_i^2/N_A$

Fermi Level in Extrinsic Semiconductors

In N-type: The Fermi level shifts toward the conduction band. At low temperatures, it lies between the donor level and $E_C$. As temperature increases, more donor atoms get ionized, and eventually the material behaves intrinsically, with $E_F$ moving back toward the mid-gap $E_i$.

In P-type: The Fermi level shifts toward the valence band. At low temperatures, it lies between the acceptor level and $E_V$. With increasing temperature, $E_F$ gradually moves toward $E_i$.

Variation of Fermi Level with Temperature

  1. Initially, with a small increase in temperature, $E_F$ increases slightly (in N-type) or decreases slightly (in P-type).
  2. As temperature rises, more and more dopant atoms are ionized.
  3. At very high temperatures, the generation of electron-hole pairs due to breaking of covalent bonds dominates over doping. The material tends to behave in an intrinsic manner, and the Fermi level gradually moves toward the intrinsic Fermi level $E_i$ (mid-gap).
Properties of Germanium & Silicon
PropertyGermanium (Ge)Silicon (Si)
Atomic Number3214
Band Gap $E_g$0.67 eV1.12 eV
Intrinsic concentration $n_i$ (at 300 K)$2.4 \times 10^{13}$ /cmยณ$1.5 \times 10^{10}$ /cmยณ
Crystal StructureDiamond cubicDiamond cubic
Electron mobility $\mu_e$3900 cmยฒ/Vยทs1350 cmยฒ/Vยทs
Hole mobility $\mu_h$1900 cmยฒ/Vยทs480 cmยฒ/Vยทs
Dielectric constant1611.8

Generation & Recombination

Generation is the process where electron-hole pairs are created by exciting an electron from the valence band to the conduction band. Recombination is the reverse process where electrons and holes recombine and are annihilated.

In thermal equilibrium, the generation and recombination processes are in dynamic equilibrium โ€” the rate of generation equals the rate of recombination.

Types of Generation/Recombination Processes

  1. Photon Transition (Optical) โ€” Absorption of a photon creates an EHP; emission of a photon occurs during recombination (used in LEDs and solar cells).
  2. Phonon Transition (Shockley-Read-Hall / SRH) โ€” Recombination through trap states (defects/impurities) in the forbidden gap. Most common in indirect bandgap semiconductors like Si.
  3. Auger Recombination โ€” A three-particle process where the energy released during recombination is transferred to a third carrier instead of a photon. Important at very high carrier concentrations.
  4. Impact Ionization โ€” A high-energy carrier collides with the lattice and generates a new EHP. This is the mechanism behind avalanche breakdown in diodes.
Carrier Lifetime

The carrier lifetime ($\tau$) is the average time a minority carrier exists before recombining. It determines how far carriers can diffuse before recombining, and is critical for device performance:

$$L = \sqrt{D \cdot \tau}$$

where $L$ is the diffusion length and $D$ is the diffusion coefficient. A longer carrier lifetime means carriers travel farther before recombining โ€” essential for solar cells and transistors.

Direct vs Indirect Band Gap

PropertyDirect Band GapIndirect Band Gap
E-k diagramCB minimum and VB maximum at same $k$CB minimum and VB maximum at different $k$
TransitionElectron can directly emit/absorb photonRequires phonon (lattice vibration) assist
ExamplesGaAs, InP, GaNSi, Ge
ApplicationsLEDs, Laser diodes, solar cellsTransistors, ICs, CPUs
This is why Silicon is used for CPUs (doesn't need to emit light, excellent oxide layer) but GaAs is used for LEDs and lasers (efficient light emission due to direct band gap).

Solar Cells & Computational Applications

Solar Cell Basics

A solar cell is a PN junction operated under illumination. When photons with energy $h\nu \geq E_g$ strike the cell, electron-hole pairs are generated in the depletion region. The built-in electric field separates them โ€” electrons go to n-side, holes to p-side โ€” creating a photocurrent and photovoltage.

  • Open-circuit voltage: $V_{OC} = \frac{kT}{q}\ln\left(\frac{I_L}{I_0} + 1\right)$
  • Short-circuit current: $I_{SC} \approx I_L$ (photogenerated current)
  • Efficiency: $\eta = \frac{P_{max}}{P_{incident}} = \frac{V_{OC} \cdot I_{SC} \cdot FF}{P_{in}}$ where $FF$ is the fill factor (~0.7โ€“0.85).

Computational Applications

Chip Fabrication Basics

Modern CPUs and GPUs are built on silicon wafers using a highly complex manufacturing process called fabrication. The key steps include:

  1. Wafer Preparation: Pure silicon is grown into a single-crystal ingot and sliced into ultra-thin circular wafers.
  2. Photolithography: The wafer is coated with a light-sensitive photoresist. UV light shines through a "mask" (blueprint of the circuit), printing nanometer-scale patterns onto the wafer.
  3. Etching & Deposition: Chemicals etch away unprotected areas to create 3D structures, while new materials (insulators, metals) are deposited in layers.
  4. Doping (Ion Implantation): High-energy ion beams shoot specific impurities (like Boron or Phosphorus) into the silicon to create N-type and P-type regions, forming the actual transistors.

This cycle repeats 50+ times to build billions of microscopic transistors layer by layer.

CMOS Technology

CMOS (Complementary Metal-Oxide-Semiconductor) uses pairs of NMOS and PMOS transistors. A CMOS inverter has near-zero static power consumption because only one transistor is ON at a time. This is why modern CPUs can have billions of transistors without melting!

Memory Devices

SRAM: Uses 6 transistors per bit. Fast but expensive. Used in CPU cache.

DRAM: Uses 1 transistor + 1 capacitor per bit. Slower but dense. Used as main RAM.

Flash/SSD: Uses floating-gate transistors. Electrons trapped on the floating gate represent stored data. NAND flash stacks cells vertically (3D NAND) for massive storage.

AI Accelerator Chips & IoT Sensors

GPU: Thousands of small cores for parallel matrix multiplication โ€” ideal for neural network training.

TPU (Google's Tensor Processing Unit): Custom ASIC designed specifically for matrix operations in AI/ML.

IoT Sensors: Semiconductor-based sensors (temperature, pressure, gas, light) use changes in resistance, capacitance, or current due to physical stimuli.

India's Semi-Conductor Laboratory (SCL), Mohali is India's only chip fab. Under the India Semiconductor Mission (โ‚น76,000 crore budget), Tata Electronics and CG Power are building new fabs in Gujarat and Dholera. By 2028, India aims to produce chips for defense, automotive, and telecom sectors.

MCQ Assessment โ€” Unit I

Q1

In the Drude model, the drift velocity of electrons is proportional to:

  1. Electric field strength
  2. Square of electric field
  3. Magnetic field
  4. Temperature
โœ… A. $v_d = \frac{eE\tau}{m}$, so drift velocity is directly proportional to $E$.
Q2

The Fermi-Dirac distribution function at $E = E_F$ gives a probability of:

  1. 0
  2. 1
  3. 0.5
  4. Depends on temperature
โœ… C. At $E = E_F$, $f(E_F) = \frac{1}{1+e^0} = \frac{1}{2} = 0.5$ for all temperatures.
Q3

The band gap of Silicon at room temperature is approximately:

  1. 0.67 eV
  2. 1.12 eV
  3. 1.43 eV
  4. 5.5 eV
โœ… B. Si โ‰ˆ 1.12 eV. Ge โ‰ˆ 0.67 eV. GaAs โ‰ˆ 1.43 eV. Diamond โ‰ˆ 5.5 eV.
Q4

The Hall coefficient for an n-type semiconductor is:

  1. Positive
  2. Negative
  3. Zero
  4. Infinite
โœ… B. For n-type, $R_H = -\frac{1}{ne}$ (negative because majority carriers are electrons).
Q5

In a p-type semiconductor, the Fermi level is:

  1. At the middle of the band gap
  2. Close to the conduction band
  3. Close to the valence band
  4. Above the conduction band
โœ… C. In p-type, acceptor impurities create holes, pulling the Fermi level toward the valence band.
Q6

Which material is used for LEDs because of its direct band gap?

  1. Silicon
  2. Germanium
  3. GaAs
  4. Diamond
โœ… C. GaAs has a direct band gap allowing efficient photon emission.
Q7

Effective mass of an electron is determined from the E-k diagram by:

  1. Slope of the curve
  2. Curvature (second derivative)
  3. Area under the curve
  4. Y-intercept
โœ… B. $m^* = \hbar^2 / (d^2E/dk^2)$. Greater curvature = smaller effective mass.
Q8

Diffusion current in a semiconductor is caused by:

  1. Electric field
  2. Concentration gradient
  3. Magnetic field
  4. Temperature gradient only
โœ… B. Diffusion current arises from carrier concentration gradients: $J_{diff} = -qD(dn/dx)$.
Q9

In CMOS technology, zero static power consumption is achieved because:

  1. Both transistors are always ON
  2. Only one transistor (NMOS or PMOS) is ON at a time
  3. No transistors are used
  4. Capacitors store the charge
โœ… B. In a CMOS inverter, NMOS and PMOS are complementary โ€” only one conducts at any time, so no DC path from VDD to ground.
Q10

The fill factor of a solar cell is the ratio of:

  1. $V_{OC}$ to $I_{SC}$
  2. Maximum power to ($V_{OC} \times I_{SC}$)
  3. Input power to output power
  4. Band gap to photon energy
โœ… B. $FF = \frac{P_{max}}{V_{OC} \cdot I_{SC}}$. Typical values: 0.7โ€“0.85.
Q11

According to the Mass Action Law, in a semiconductor at thermal equilibrium:

  1. $n + p = n_i$
  2. $n \cdot p = n_i^2$
  3. $n - p = n_i$
  4. $n / p = n_i$
โœ… B. The Mass Action Law states $n \cdot p = n_i^2$. This holds for both intrinsic and extrinsic semiconductors at thermal equilibrium.
Q12

In an N-type semiconductor with donor concentration $N_D$, the minority carrier (hole) concentration is:

  1. $p = N_D$
  2. $p = n_i$
  3. $p = n_i^2 / N_D$
  4. $p = N_D / n_i$
โœ… C. In N-type, $n \approx N_D$ (majority). Using Mass Action Law: $p = n_i^2/n = n_i^2/N_D$.
Q13

In an N-type semiconductor, the donor impurity atom has how many valence electrons?

  1. 3
  2. 4
  3. 5
  4. 6
โœ… C. N-type uses pentavalent (5 valence electrons) dopants like P, As, Sb. The 5th electron is weakly bound and becomes a free carrier.
Q14

Which recombination process involves transfer of energy to a third carrier?

  1. Photon transition
  2. Shockley-Read-Hall (SRH)
  3. Auger recombination
  4. Impact ionization
โœ… C. In Auger recombination, the energy released when an electron and hole recombine is transferred to a third carrier (electron or hole) instead of being emitted as a photon.
Q15

The charge neutrality equation in a semiconductor is:

  1. $n = p$
  2. $n + N_A = p + N_D$
  3. $n \cdot p = N_D \cdot N_A$
  4. $n + N_D = p + N_A$
โœ… B. Charge neutrality requires total positive charge = total negative charge: $p + N_D^+ = n + N_A^-$, which is equivalently written as $n + N_A = p + N_D$ (assuming full ionization).

๐Ÿ“‹ Unit I Summary

  • Drude Model: Free electrons, drift velocity $v_d = eE\tau/m$, conductivity $\sigma = ne^2\tau/m$
  • Density of States: $n = \int g(E) \cdot f(E) \, dE$; counts available carriers at each energy
  • Fermi-Dirac: $f(E) = 1/[1 + \exp((E-E_F)/kT)]$; $f(E_F) = 0.5$ always; $1-f(E)$ = hole probability
  • Significance of Fermi Level: Separates filled/vacant states at 0 K; position indicates doping type
  • Band Gap: Conductor (0 eV, overlapping), Semiconductor (0.1โ€“3 eV), Insulator (>3 eV, ~10 eV)
  • Effective Mass: $m^* = \hbar^2/(d^2E/dk^2)$; holes = missing electrons with positive mass
  • Hall Effect: $V_H = BI/(net)$; $R_H = 1/(ne)$; determines carrier type, concentration, mobility
  • Intrinsic SC: $n = p = n_i$; $E_F \approx (E_C+E_V)/2$; $n_i = \sqrt{N_C N_V} \exp(-E_g/2kT)$
  • Mass Action Law: $n \cdot p = n_i^2$ (always, regardless of doping)
  • N-type: Pentavalent donor, $E_F$ near $E_C$, $n \approx N_D$; P-type: Trivalent acceptor, $E_F$ near $E_V$, $p \approx N_A$
  • Charge Neutrality: $n + N_A^- = p + N_D^+$
  • Generation/Recombination: Photon, SRH, Auger, Impact ionization; Carrier lifetime $\tau$, diffusion length $L = \sqrt{D\tau}$
  • Direct bandgap (GaAs) โ†’ LEDs/lasers; Indirect (Si) โ†’ CPUs/ICs
  • Ge vs Si: Ge ($E_g$ = 0.67 eV, $n_i$ = 2.4ร—10ยนยณ/cmยณ); Si ($E_g$ = 1.12 eV, $n_i$ = 1.5ร—10ยนโฐ/cmยณ)
Unit II

Fundamentals of Electricity & Devices

โšก India's Power Grid โ€” 1.4 Billion People, One Interconnected Circuit

India's power grid is the world's largest interconnected grid, connecting 1.4 billion people across 28 states. Reliance Jio laid 9 lakh km of optical fiber โ€” enough to wrap around Earth 22 times โ€” to bring 4G to every village. Every wire, every junction, every optical signal obeys the electrical laws you're about to master.

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Fundamental Electrical Laws

Ohm's Law

The current $I$ through a conductor is directly proportional to the voltage $V$ across it:

$$V = IR$$

Resistance depends on material and geometry: $R = \rho \frac{L}{A}$, where $\rho$ = resistivity, $L$ = length, $A$ = cross-sectional area.

Kirchhoff's Current Law (KCL)

The algebraic sum of all currents at any node is zero:

$$\sum I_{in} = \sum I_{out} \quad \text{or} \quad \sum I = 0$$

Kirchhoff's Voltage Law (KVL)

The algebraic sum of all voltages around any closed loop is zero:

$$\sum V = 0$$

Voltage & Current Division Rules

Voltage Division Rule (VDR) โ€” Derivation

For two resistors $R_1$ and $R_2$ in series connected to a source $V_s$:

Since series current is the same: $I = \frac{V_s}{R_1 + R_2}$

Voltage across $R_1$:

$$\boxed{V_1 = V_s \times \frac{R_1}{R_1 + R_2}}$$

Voltage across $R_2$:

$$V_2 = V_s \times \frac{R_2}{R_1 + R_2}$$

Solved Example โ€” VDR

Numerical

Problem: A 12V source is connected to $R_1 = 4\text{k}\Omega$ and $R_2 = 8\text{k}\Omega$ in series. Find voltage across each.

Solution: $V_1 = 12 \times \frac{4}{4+8} = 12 \times \frac{1}{3} = 4\text{V}$

$V_2 = 12 \times \frac{8}{12} = 8\text{V}$. Check: $4 + 8 = 12$ โœ“

Current Division Rule (CDR) โ€” Derivation

For two resistors $R_1$ and $R_2$ in parallel connected to a current source $I_s$:

Voltage across parallel combination: $V = I_s \times \frac{R_1 R_2}{R_1 + R_2}$

Current through $R_1$:

$$\boxed{I_1 = I_s \times \frac{R_2}{R_1 + R_2}}$$

(Note: current through $R_1$ depends on the other resistor $R_2$.)

PN Junction Diode

Formation of PN Junction

When p-type and n-type semiconductors are joined:

  1. Electrons from n-side diffuse into p-side; holes from p-side diffuse into n-side.
  2. This creates a region depleted of free carriers: the depletion region.
  3. Immobile ions in the depletion region create a built-in potential $V_{bi}$ (โ‰ˆ0.7V for Si, 0.3V for Ge).
  4. The built-in field opposes further diffusion, establishing equilibrium.

Shockley Diode Equation

$$I = I_s\left(e^{qV/nkT} - 1\right)$$

where $I_s$ โ‰ˆ 10โปยนยฒ A (reverse saturation current), $n$ = ideality factor (1โ€“2), $V_T = kT/q$ โ‰ˆ 26 mV at 300K.

V-I Characteristics

RegionConditionCurrent
Forward bias$V > 0$ (p positive, n negative)Exponentially increasing after $V_{bi}$
Reverse bias$V < 0$Small constant $-I_s$ (leakage)
Breakdown$V < -V_{BR}$Sudden large reverse current

Rectifier Applications

Half-Wave Rectifier: Uses one diode. Only positive half-cycle passes.

  • $V_{dc} = \frac{V_m}{\pi} \approx 0.318 V_m$
  • Ripple factor $\gamma = 1.21$ (very high)
  • Efficiency $\eta = 40.6\%$

Full-Wave Rectifier (Bridge): Uses 4 diodes. Both half-cycles are rectified.

  • $V_{dc} = \frac{2V_m}{\pi} \approx 0.636 V_m$
  • Ripple factor $\gamma = 0.48$ (much better)
  • Efficiency $\eta = 81.2\%$
ParameterHalf-WaveFull-Wave (Bridge)
No. of diodes14
$V_{dc}$$V_m/\pi$$2V_m/\pi$
Ripple factor1.210.48
Efficiency40.6%81.2%
TransformerNot neededNot needed

Bipolar Junction Transistor (BJT)

A BJT has three regions: Emitter (heavily doped), Base (thin, lightly doped), Collector (moderately doped, large area).

Current Relations

$$I_E = I_B + I_C$$ $$\alpha = \frac{I_C}{I_E} \quad (\text{common-base current gain, } \approx 0.95\text{โ€“}0.99)$$ $$\beta = \frac{I_C}{I_B} \quad (\text{common-emitter current gain, } \approx 50\text{โ€“}300)$$ $$\beta = \frac{\alpha}{1 - \alpha} \quad \text{and} \quad \alpha = \frac{\beta}{\beta + 1}$$

Regions of Operation

RegionBE JunctionBC JunctionUse
ActiveForward biasedReverse biasedAmplification
SaturationForward biasedForward biasedSwitch ON
CutoffReverse biasedReverse biasedSwitch OFF

Solved Example โ€” BJT

Numerical

Problem: A BJT has $\beta = 100$ and $I_B = 20\mu$A. Find $I_C$ and $I_E$.

Solution: $I_C = \beta \cdot I_B = 100 \times 20\mu\text{A} = 2\text{ mA}$

$I_E = I_C + I_B = 2\text{ mA} + 0.02\text{ mA} = 2.02\text{ mA}$

$\alpha = \beta/(\beta+1) = 100/101 = 0.99$. Check: $\alpha \cdot I_E = 0.99 \times 2.02 = 2$ mA = $I_C$ โœ“

Optical Fiber Communication

Optical fibers transmit data as light pulses via Total Internal Reflection (TIR).

Critical angle (from Snell's law): When $\theta_r = 90ยฐ$:

$$n_1 \sin\theta_c = n_2 \sin 90ยฐ \implies \boxed{\theta_c = \sin^{-1}\left(\frac{n_2}{n_1}\right)}$$

Numerical Aperture: $NA = \sqrt{n_1^2 - n_2^2}$ determines the light-gathering ability.

TypeSingle-ModeMulti-Mode
Core diameter8โ€“10 ฮผm50โ€“62.5 ฮผm
DistanceUp to 100 kmUp to 2 km
BandwidthVery highModerate
UseLong-haul telecomLAN, data centers

Wireless Communication โ€” Basics

Wireless signals use electromagnetic waves modulated to carry information:

  • AM (Amplitude Modulation): Signal varies the amplitude of the carrier wave. Used in AM radio.
  • FM (Frequency Modulation): Signal varies the frequency. Better noise immunity. Used in FM radio.
  • Digital Modulation: ASK, FSK, PSK โ€” used in WiFi, 4G, 5G.

MCQ Assessment โ€” Unit II

Q1

In voltage division, the voltage across a resistor in series is proportional to:

  1. Its own resistance
  2. The other resistance
  3. Total current
  4. Total power
โœ… A. $V_1 = V_s \times R_1/(R_1+R_2)$, proportional to its own resistance.
Q2

The built-in potential of a silicon PN junction is approximately:

  1. 0.3 V
  2. 0.7 V
  3. 1.1 V
  4. 5.0 V
โœ… B. Si โ‰ˆ 0.7V, Ge โ‰ˆ 0.3V.
Q3

The ripple factor of a full-wave bridge rectifier is:

  1. 1.21
  2. 0.48
  3. 0.00
  4. 2.00
โœ… B. Full-wave bridge: $\gamma = 0.48$. Half-wave: $\gamma = 1.21$.
Q4

If $\beta = 200$ for a BJT and $I_C = 4$ mA, the base current is:

  1. 20 ฮผA
  2. 200 ฮผA
  3. 0.8 A
  4. 2 mA
โœ… A. $I_B = I_C/\beta = 4\text{mA}/200 = 20\mu$A.
Q5

In an optical fiber, total internal reflection occurs when:

  1. Angle of incidence < critical angle
  2. Angle of incidence > critical angle
  3. Core has lower refractive index than cladding
  4. Light exits through the cladding
โœ… B. TIR occurs when the angle of incidence exceeds the critical angle and core has higher refractive index.

๐Ÿ“‹ Unit II Summary

  • Ohm's Law: $V = IR$; KCL: $\sum I = 0$; KVL: $\sum V = 0$
  • VDR: $V_1 = V_s \cdot R_1/(R_1+R_2)$; CDR: $I_1 = I_s \cdot R_2/(R_1+R_2)$
  • Diode: $I = I_s(e^{V/nV_T}-1)$; $V_{bi}$ โ‰ˆ 0.7V (Si), 0.3V (Ge)
  • HWR: $V_{dc} = V_m/\pi$, $\gamma = 1.21$; FWR: $V_{dc} = 2V_m/\pi$, $\gamma = 0.48$
  • BJT: $I_E = I_B + I_C$, $\beta = I_C/I_B$, $\alpha = I_C/I_E = \beta/(\beta+1)$
  • Optical Fiber: $\theta_c = \sin^{-1}(n_2/n_1)$; $NA = \sqrt{n_1^2 - n_2^2}$
$$\boxed{ G = A_1 \overline{B_1} + A_0 \overline{B_1} \overline{B_0} + A_1 A_0 \overline{B_0} }$$ $$\boxed{ E = \overline{A_1}\ \overline{A_0}\ \overline{B_1}\ \overline{B_0} + \overline{A_1} A_0 \overline{B_1} B_0 + A_1 A_0 B_1 B_0 + A_1 \overline{A_0} B_1 \overline{B_0} }$$ $$\boxed{ L = \overline{A_1} B_1 + \overline{A_0} B_1 B_0 + \overline{A_1}\ \overline{A_0} B_0 }$$
Unit V

Sequential Logic Circuits

โฐ Flip-Flops โ€” The Memory Cells That Keep Time

Every second, the quartz crystal inside your laptop vibrates 3.2 billion times (3.2 GHz clock). Each tick of this clock triggers millions of flip-flops to update their state โ€” storing the next instruction, the next pixel, the next packet. Without flip-flops, computers would have no memory and no concept of "before" and "after."

IntelAMD๐Ÿ‡ฎ๐Ÿ‡ณ DRDOQualcomm

Latches

Key Difference: A latch is level-sensitive (transparent when enable is high). A flip-flop is edge-triggered (changes only on clock edge).

SR Latch (using NOR gates)

SR$Q_{next}$$\overline{Q}_{next}$State
00$Q$$\overline{Q}$Hold / No change
0101Reset
1010Set
1100โŒ Invalid / Forbidden
The S=R=1 state is invalid because both Q and Q' become 0, violating the complementary requirement. When inputs return to S=R=0, the output is unpredictable (race condition).

D Latch

Eliminates the invalid state by using a single data input $D$. Internally: $S = D$, $R = \overline{D}$.

EnableD$Q_{next}$Action
0X$Q$Hold
100Reset
111Set

Characteristic equation: $Q_{next} = D$ (when enabled)

Flip-Flops

SR Flip-Flop

Characteristic equation: $Q_{next} = S + \overline{R} \cdot Q$ with constraint $SR = 0$

SR$Q_{next}$
00$Q$ (Hold)
010 (Reset)
101 (Set)
11โŒ Invalid

Excitation Table (given desired transition, find required inputs):

$Q$$Q_{next}$SR
000X
0110
1001
11X0

JK Flip-Flop

Solves the invalid state problem of SR. When J=K=1, the output toggles.

Characteristic equation: $\boxed{Q_{next} = J\overline{Q} + \overline{K}Q}$

JK$Q_{next}$Action
00$Q$Hold
010Reset
101Set
11$\overline{Q}$Toggle

Excitation Table:

$Q$$Q_{next}$JK
000X
011X
10X1
11X0

D Flip-Flop

Characteristic equation: $Q_{next} = D$. Most widely used in registers and memory.

Excitation Table: $Q \rightarrow Q_{next}$: D = $Q_{next}$ (always!)

T Flip-Flop (Toggle)

Characteristic equation: $Q_{next} = T \oplus Q = T\overline{Q} + \overline{T}Q$

T$Q_{next}$Action
0$Q$Hold
1$\overline{Q}$Toggle

T flip-flops are ideal for counters because each stage divides the frequency by 2.

Master-Slave JK Flip-Flop

The basic JK flip-flop has a race condition: if J=K=1 and the clock pulse is wide, the output may toggle multiple times during a single clock pulse.

Solution: Master-Slave configuration:

  1. Master (first FF): Captures input on the positive edge (clock = 1)
  2. Slave (second FF): Transfers master's output on the negative edge (clock = 0)
  3. Since master and slave never operate simultaneously, race condition is eliminated.

Flip-Flop Conversion

General Procedure:

  1. Write the characteristic table of the desired flip-flop.
  2. Write the excitation table of the available flip-flop.
  3. For each row, determine the required inputs of the available FF.
  4. Use K-maps to derive the expressions connecting desired inputs to available inputs.

Solved Example: Convert JK โ†’ D Flip-Flop

JK to D Conversion

D flip-flop: $Q_{next} = D$. We need to express J and K in terms of D and Q.

$Q$$D$ (input)$Q_{next}$$J$ (needed)$K$ (needed)
0000X
0111X
100X1
111X0

From the table: $J = D$ and $K = \overline{D}$.

Circuit: Connect $D$ to the $J$ input and $\overline{D}$ (through an inverter) to the $K$ input of the JK flip-flop.

Convert D โ†’ T Flip-Flop

T FF: $Q_{next} = T \oplus Q$. D FF excitation: $D = Q_{next}$.

So: $D = T \oplus Q$. Circuit: XOR gate with T and Q feeding into D input.

Shift Registers

TypeInputOutputApplication
SISOSerialSerialTime delay
SIPOSerialParallelSerial-to-parallel conversion
PISOParallelSerialParallel-to-serial conversion
PIPOParallelParallelTemporary storage, buffer

SISO Operation Example

Loading data 1011 into a 4-bit SISO register (MSB first):

ClockInput$Q_3$$Q_2$$Q_1$$Q_0$
Initialโ€”0000
111000
200100
311010
411101

After 4 clock pulses, data appears serially at $Q_0$ output.

Asynchronous (Ripple) Counters

3-Bit UP Counter

Uses 3 T flip-flops with T=1 (always toggle). Clock of each FF is connected to the Q output of the previous FF.

Clock$Q_2$$Q_1$$Q_0$Decimal
00000
10011
20102
30113
41004
51015
61106
71117
80000 (repeat)

Counts from 0 to $2^N - 1$. For 3 bits: 0 to 7. DOWN counter: Connect clock to $\overline{Q}$ instead of $Q$.

Mod-N Counter

A Mod-N counter counts from 0 to N-1 and then resets. Design: Use enough flip-flops ($\lceil \log_2 N \rceil$) and add reset logic.

Design: Mod-5 Counter

Need to count: 0, 1, 2, 3, 4, then reset to 0. Need 3 flip-flops ($\lceil \log_2 5 \rceil = 3$).

Count 5 in binary = 101. When $Q_2Q_1Q_0 = 101$, apply RESET.

Reset logic: NAND gate detecting $Q_2 = 1$ AND $Q_0 = 1$ โ†’ Clear all flip-flops.

Note: State 101 appears momentarily before reset (called a glitch).

MCQ Assessment โ€” Unit V

Q1

The characteristic equation of a JK flip-flop is:

  1. $Q_{next} = J + K$
  2. $Q_{next} = J\overline{Q} + \overline{K}Q$
  3. $Q_{next} = JK$
  4. $Q_{next} = J \oplus K$
โœ… B. $Q_{next} = J\overline{Q} + \overline{K}Q$.
Q2

The SR latch has an invalid state when:

  1. S=0, R=0
  2. S=0, R=1
  3. S=1, R=0
  4. S=1, R=1
โœ… D. Both S and R high causes both Q and Q' to be 0, violating complementary rule.
Q3

A T flip-flop with T=1 connected to a 10 MHz clock produces an output frequency of:

  1. 10 MHz
  2. 20 MHz
  3. 5 MHz
  4. 1 MHz
โœ… C. T=1 means toggle every clock edge โ†’ frequency division by 2 โ†’ 5 MHz.
Q4

To convert a JK flip-flop to a D flip-flop, connect:

  1. J=D, K=D
  2. J=D, K=$\overline{D}$
  3. J=$\overline{D}$, K=D
  4. J=1, K=D
โœ… B. $J=D$ and $K=\overline{D}$. When D=1: J=1,K=0 โ†’ Set. When D=0: J=0,K=1 โ†’ Reset.
Q5

A Mod-6 counter requires how many flip-flops?

  1. 2
  2. 3
  3. 4
  4. 6
โœ… B. $\lceil \log_2 6 \rceil = 3$ flip-flops. They count 0-7 but reset at 6 (110).
Q6

Which register type converts serial data to parallel?

  1. SISO
  2. SIPO
  3. PISO
  4. PIPO
โœ… B. SIPO = Serial In, Parallel Out.

๐Ÿ“‹ Unit V Summary โ€” All Characteristic Equations

Flip-FlopCharacteristic EquationSpecial Feature
SR$Q_{next} = S + \overline{R}Q$, SR=0Invalid state at S=R=1
JK$Q_{next} = J\overline{Q} + \overline{K}Q$Toggle at J=K=1
D$Q_{next} = D$Most used in registers
T$Q_{next} = T \oplus Q$Used in counters
  • Master-Slave: Eliminates race condition by two-phase clocking
  • Registers: SISO (delay), SIPO (serialโ†’parallel), PISO (parallelโ†’serial), PIPO (buffer)
  • Counters: N flip-flops โ†’ count 0 to $2^N-1$. Mod-N: reset at N using feedback logic.
Unit VI

Introduction to Arduino & Sensors

๐ŸŒพ IoT Revolution โ€” From Smart Farms to Smart Cities

Indian startup Fasal uses IoT sensors (temperature, humidity, soil moisture) connected to microcontrollers to help farmers reduce water usage by 40% and increase crop yield by 25%. Globally, there are over 15 billion IoT devices โ€” more than twice the world's population. Arduino, a โ‚น500 microcontroller board, is the gateway to this revolution.

๐Ÿ‡ฎ๐Ÿ‡ณ Fasal๐Ÿ‡ฎ๐Ÿ‡ณ CropInArduinoRaspberry Pi๐Ÿ‡ฎ๐Ÿ‡ณ Smart Cities Mission

Analog vs Digital Signals

PropertyAnalog SignalDigital Signal
NatureContinuous (smooth wave)Discrete (0s and 1s)
ValuesInfinite values in a rangeOnly two levels (HIGH/LOW)
Noise immunityLow (susceptible to noise)High (noise can be filtered)
ProcessingOp-amps, analog circuitsMicrocontrollers, logic gates
ExampleTemperature, audio, voltageSwitch state, serial data
StorageDifficult, degrades over timeEasy, perfect copies

ADC (Analog-to-Digital Converter): Converts continuous signals to discrete digital values. An $n$-bit ADC has $2^n$ levels. Arduino's 10-bit ADC โ†’ $2^{10} = 1024$ levels (0 to 1023).

DAC (Digital-to-Analog Converter): Converts digital values back to analog. Arduino uses PWM (Pulse Width Modulation) to simulate DAC.

Arduino Uno Board

Technical Specifications

ParameterValue
MicrocontrollerATmega328P
Clock Speed16 MHz
Flash Memory32 KB (0.5 KB for bootloader)
SRAM2 KB
EEPROM1 KB
Digital I/O Pins14 (6 provide PWM)
Analog Input Pins6 (A0โ€“A5)
Operating Voltage5V
Input Voltage7โ€“12V (via Vin/barrel jack)
DC Current per I/O20 mA (max 40 mA)

Pin Configuration

Pin CategoryPinsDescription
PowerVin, 5V, 3.3V, GNDPower supply and ground connections
Digital I/OD0โ€“D13Digital input/output. D0/D1 = Serial (TX/RX)
PWMD3, D5, D6, D9, D10, D11Analog-like output using pulse width modulation (marked with ~)
Analog InputA0โ€“A510-bit ADC (0โ€“1023 for 0โ€“5V)
CommunicationD10โ€“D13 (SPI), A4/A5 (I2C)SPI and I2C protocols for sensors/displays
OtherRESET, AREF, ICSPReset button, analog reference, in-circuit programming

Arduino Program Structure

// Every Arduino program has two mandatory functions

void setup() {
  // Runs ONCE when board powers on or resets
  pinMode(13, OUTPUT);    // Set pin 13 as output
  Serial.begin(9600);    // Start serial communication
}

void loop() {
  // Runs REPEATEDLY forever
  digitalWrite(13, HIGH);  // LED ON
  delay(1000);              // Wait 1 second
  digitalWrite(13, LOW);   // LED OFF
  delay(1000);              // Wait 1 second
}

Sensors

IR Sensor

Working Principle: An IR LED emits infrared light. A photodiode detects the reflected IR. When an obstacle is present, IR bounces back โ†’ photodiode receives signal โ†’ output goes LOW (active low).

Connections: VCC โ†’ 5V, GND โ†’ GND, OUT โ†’ Digital pin

// IR Sensor โ€” Obstacle Detection
const int irPin = 2;

void setup() {
  pinMode(irPin, INPUT);
  Serial.begin(9600);
}

void loop() {
  int val = digitalRead(irPin);
  if (val == LOW) {
    Serial.println("Obstacle Detected!");
  } else {
    Serial.println("No Obstacle");
  }
  delay(200);
}

LDR (Light Dependent Resistor)

Working Principle: Made of Cadmium Sulfide (CdS). Resistance decreases with increasing light intensity. In dark: ~1 Mฮฉ. In bright light: ~1 kฮฉ.

Circuit: Use a voltage divider with a fixed resistor (10kฮฉ). Connect the junction to an analog pin.

// LDR โ€” Automatic Street Light
const int ldrPin = A0;
const int ledPin = 13;

void setup() {
  pinMode(ledPin, OUTPUT);
  Serial.begin(9600);
}

void loop() {
  int lightLevel = analogRead(ldrPin);  // 0-1023
  Serial.print("Light: ");
  Serial.println(lightLevel);
  
  if (lightLevel < 300) {  // Dark โ†’ turn ON street light
    digitalWrite(ledPin, HIGH);
  } else {
    digitalWrite(ledPin, LOW);
  }
  delay(500);
}

Ultrasonic Sensor (HC-SR04)

Working Principle: Sends a 40 kHz ultrasonic pulse via the Trigger pin. The pulse bounces off an object and returns to the Echo pin. The time taken for the round trip determines the distance.

Formula:

$$Distance = \frac{Time \times Speed\ of\ Sound}{2} = \frac{Time\ (\mu s) \times 0.034}{2} \text{ cm}$$

Pins: VCC (5V), Trig (digital out), Echo (digital in), GND

// HC-SR04 Ultrasonic Distance Measurement
const int trigPin = 9;
const int echoPin = 10;

void setup() {
  pinMode(trigPin, OUTPUT);
  pinMode(echoPin, INPUT);
  Serial.begin(9600);
}

void loop() {
  // Send 10ฮผs pulse
  digitalWrite(trigPin, LOW);
  delayMicroseconds(2);
  digitalWrite(trigPin, HIGH);
  delayMicroseconds(10);
  digitalWrite(trigPin, LOW);
  
  // Measure echo duration
  long duration = pulseIn(echoPin, HIGH);
  float distance = duration * 0.034 / 2;
  
  Serial.print("Distance: ");
  Serial.print(distance);
  Serial.println(" cm");
  delay(500);
}

Temperature Sensor (DHT11 / DHT22)

Measures both temperature and humidity using a capacitive humidity sensor and a thermistor.

ParameterDHT11DHT22
Temperature Range0โ€“50ยฐC-40โ€“80ยฐC
Temp Accuracyยฑ2ยฐCยฑ0.5ยฐC
Humidity Range20โ€“80% RH0โ€“100% RH
Humidity Accuracyยฑ5%ยฑ2โ€“5%
Sampling Rate1 Hz (once/sec)0.5 Hz (once/2 sec)
Price~โ‚น50~โ‚น200
ResolutionInteger only0.1ยฐ decimal

Data Format: 40-bit serial data = 8-bit humidity integer + 8-bit humidity decimal + 8-bit temperature integer + 8-bit temperature decimal + 8-bit checksum.

// DHT11 Temperature & Humidity (using DHT library)
#include "DHT.h"

#define DHTPIN 2
#define DHTTYPE DHT11

DHT dht(DHTPIN, DHTTYPE);

void setup() {
  Serial.begin(9600);
  dht.begin();
}

void loop() {
  float humidity = dht.readHumidity();
  float tempC = dht.readTemperature();
  
  if (isnan(humidity) || isnan(tempC)) {
    Serial.println("Sensor read failed!");
    return;
  }
  
  Serial.print("Humidity: ");
  Serial.print(humidity);
  Serial.print("% | Temp: ");
  Serial.print(tempC);
  Serial.println("ยฐC");
  delay(2000);
}

Mini-Projects

๐Ÿ› ๏ธ Project 1: Smart Parking System

Use an ultrasonic sensor at each parking slot. If distance < 10 cm โ†’ slot occupied (Red LED). If distance > 10 cm โ†’ slot available (Green LED). Display count on Serial Monitor.

๐ŸŒค๏ธ Project 2: IoT Weather Station

Use DHT22 (temperature + humidity) + LDR (light level). Log readings to Serial Monitor every 5 seconds. Can be extended with ESP8266 WiFi module to upload data to ThingSpeak cloud.

๐Ÿค– Project 3: Line Follower Robot

Use 2 IR sensors mounted under the robot. Left sensor detects line โ†’ turn left. Right sensor detects line โ†’ turn right. Both detect โ†’ go straight. Neither detects โ†’ stop. Motors controlled via L298N driver.

India's Smart Cities Mission (100 cities, โ‚น48,000 crore) deploys IoT sensors for traffic management, waste monitoring, water quality, and air pollution. Cities like Pune, Surat, and Bhopal use Arduino-compatible sensors in public infrastructure.
IoT freelancing on Fiverr and Upwork pays $20โ€“100/hr for Arduino projects. Common gigs: home automation, sensor data logging, prototype development. Indian students earn โ‚น15,000โ€“50,000/month doing IoT freelancing!

MCQ Assessment โ€” Unit VI

Q1

Arduino Uno uses which microcontroller?

  1. ATmega2560
  2. ATmega328P
  3. ESP8266
  4. STM32
โœ… B. Arduino Uno uses ATmega328P at 16 MHz.
Q2

The resolution of Arduino's built-in ADC is:

  1. 8-bit (256 levels)
  2. 10-bit (1024 levels)
  3. 12-bit (4096 levels)
  4. 16-bit
โœ… B. Arduino Uno has a 10-bit ADC โ†’ $2^{10} = 1024$ levels, mapping 0โ€“5V to 0โ€“1023.
Q3

The HC-SR04 ultrasonic sensor uses which formula for distance?

  1. $d = v \times t$
  2. $d = (t \times 0.034) / 2$
  3. $d = t / 340$
  4. $d = 2t \times v$
โœ… B. $d = \frac{time(\mu s) \times 0.034}{2}$ cm. Divide by 2 because sound travels to object and back.
Q4

DHT22 is better than DHT11 in terms of:

  1. Price
  2. Sampling speed
  3. Accuracy and range
  4. Power consumption
โœ… C. DHT22 has ยฑ0.5ยฐC accuracy vs DHT11's ยฑ2ยฐC, and wider range (-40 to 80ยฐC).
Q5

An LDR's resistance in bright light is approximately:

  1. 1 Mฮฉ
  2. 100 kฮฉ
  3. 10 kฮฉ
  4. 1 kฮฉ
โœ… D. LDR: dark โ‰ˆ 1 Mฮฉ, bright light โ‰ˆ 1 kฮฉ. Resistance decreases with light.
Q6

Which Arduino pins support PWM output?

  1. All digital pins
  2. Only analog pins
  3. D3, D5, D6, D9, D10, D11
  4. D0 and D1 only
โœ… C. PWM pins are marked with ~ symbol: 3, 5, 6, 9, 10, 11.

๐Ÿ“‹ Unit VI Summary

  • Analog vs Digital: Analog = continuous; Digital = discrete (0/1). ADC converts analog โ†’ digital.
  • Arduino Uno: ATmega328P, 16 MHz, 14 digital pins, 6 analog, 6 PWM, 10-bit ADC
  • IR Sensor: Emits IR, detects reflection. Output LOW = obstacle detected.
  • LDR: Resistance โ†“ with light โ†‘. Use voltage divider + analogRead().
  • HC-SR04: $d = (t \times 0.034)/2$ cm. Trigger pulse โ†’ measure echo time.
  • DHT11/22: Temperature + humidity. 40-bit serial data with checksum.